1. Field of the Invention
The present invention relates to an oscillator circuit, and a memory system comprising the same. For example, the present invention relates to an oscillator circuit for correcting the frequency or duty ratio of a clock.
2. Description of the Related Art
In a large-scale integrated (LSI) circuit, a clock is a referential signal for controlling operation, and the timing adjustment of the clock becomes important along with the advance of the LSI circuit. This clock is generated by, for example, an oscillator.
For example, the frequency and duty ratio of the clock are determined by a charge current and a discharge current for a load element. However, if the balance between the charge current and the discharge current is lost because of process variations or because of the variation of an operation environment including a power supply voltage and the temperature, the ratio between the high-level time and low-level time of the clock varies. As a result, the duty ratio varies.
Conventionally, in order to suppress the variation of the duty ratio, a frequency twice as high as the frequency of a necessary clock is generated, and this clock is divided by a divider so that the high-level time and low-level time of the clock may be equal. When this method is used, a frequency twice as high as the frequency of a necessary clock has to be generated, so that current consumption increases. Moreover, the generated clock has to be divided, which is disadvantageous to acceleration.
One document (Jpn. Pat. Appln. KOKAI Publication No. 2006-345405) discloses a duty ratio variable circuit which varies the slew rate of an input signal to change the duty ratio of an output pulse.